Any heads up? Thanks.
On Fri, Jan 18, 2013 at 5:28 AM, Jeff Squyres (jsquyres)
> On Jan 16, 2013, at 6:41 AM, Leif Lindholm <Leif.Lindholm_at_[hidden]> wrote:
>> That isn't, technically speaking, correct for the Raspberry Pi - but it is a workaround if you know you will never actually use the asm implementations of the atomics, but only the inline C ones..
>> This sort of hides the problem that the dedicated barrier instructions were not available in ARMv6 (it used "system control coprocessor operations" instead.
>> If you ever executed the asm implementation, you would trigger an undefined instruction exception on the Pi.
> Hah; sweet. Ok.
> So what's the right answer? Would it be acceptable to use a no-op for this operation on such architectures?
> Jeff Squyres
> For corporate legal information go to: http://www.cisco.com/web/about/doing_business/legal/cri/
> users mailing list