Open MPI logo

Open MPI User's Mailing List Archives

  |   Home   |   Support   |   FAQ   |   all Open MPI User's mailing list

Subject: Re: [OMPI users] core binding failure on Interlagos (and possibly Magny-Cours)
From: Brice Goglin (Brice.Goglin_at_[hidden])
Date: 2012-01-31 15:20:26


Le 31/01/2012 19:02, Dave Love a écrit :
>> FWIW, the Linux kernel (at least up to 3.2) still reports wrong L2 and
>> L1i cache information on AMD Bulldozer. Kernel bug reported at
>> https://bugzilla.kernel.org/show_bug.cgi?id=42607
> I assume that isn't relevant for open-mpi, just other things. Is that
> right?

In 1.5.x, cache info doesn't matter as far as I know.

In trunk, the affinity code has been reworked. I think you can bind
process to caches there. Binding to L2 wouldn't work as expected (would
bind to one core instead of 2). hwloc doesn't have instruction cache
support so far, so wrong L1i info doesn't matter.

I don't know if anybody in trunk uses shared cache size yet (for BTL SM
tuning for instance).

> We'll try to get some action out of AMD in the face of a procurement, if
> nothing else.

I just sent a link to the kernel bugreport to my hwloc contact at AMD.

Brice