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From: Weikuan Yu (weikuan.yu_at_[hidden])
Date: 2007-02-13 14:43:44


Apologies for _multiple_ copies

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                          Hot Interconnects 15
             IEEE Symposium on High-Performance Interconnects
                           August 22-24, 2007
                           Stanford University
                       Palo Alto, California, USA

Hot Interconnects is the premier international forum for researchers and
developers of state-of-the-art hardware and software architectures and
implementations for interconnection networks of all scales, ranging from
on-chip processor-memory interconnects to wide-area networks. This yearly
conference is very well attended by leaders in industry and academia. The
atmosphere provides for a wealth of opportunities to interact with
individuals at the forefront of this field.

Themes include cross-cutting issues spanning computer systems, networking
technologies, and communication protocols. This conference is directed
particularly at new and exciting technology and product innovations in these
areas. Contributions should focus on real experimental systems, prototypes,
or leading-edge products and their performance evaluation. In addition to
those subscribing to the main theme of the conference, contributions are
also solicited in the topics listed below.

     * Novel and innovative interconnect architectures
     * Multi-core processor interconnects
     * System-on-Chip Interconnects
     * Advanced chip-to-chip communication technologies
     * Optical interconnects
     * Protocol and interfaces for interprocessor communication
     * Survivability and fault-tolerance of interconnects
     * High-speed packet processing engines and network processors
     * System and storage area network architectures and protocols
     * High-performance host-network interface architectures
     * High-bandwidth and low-latency I/O
     * Tb/s switching and routing technologies
     * Innovative architectures for supporting collective communication
     * Novel communication architectures to support grid computing

Submission Guideline
     o Submission deadline: March 31, 2007
     o Notification of acceptance: May 15, 2007
     o Papers need sufficient technical detail to judge quality and
       suitability for presentation.
     o Submit title, author, abstract, and full paper (six pages,
       double-column, IEEE format).
     o Papers should be submitted electronically at the specified link
       location found on http://www.hoti.org
     o For further information please see
       http://www.hoti.org/hoti15/cfp.html

About the Conference
     - Conference held at the William Hewlett Teaching Center at
       Stanford University.
     - Papers selected will be published in proceedings by the
       IEEE Computer Society.
     - Presentations are 30-minute talks in a single-track format.
     - Online information at http://www.hoti.org

GENERAL CO-CHAIRS
     * John W. Lockwood, Washington University in St. Louis
     * Fabrizio Petrini, Pacific Northwest National Laboratory

TECHNICAL CO-CHAIRS
     * Ron Brightwell, Sandia National Laboratories
     * Dhabaleswar (DK) Panda, The Ohio State University

LOCAL ARRANGEMENTS CHAIR
     * Songkrant Muneenaem, Washington University in St. Louis

PANEL CHAIR
     * Daniel Pitt, Santa Clara University

PUBLICITY CO-CHAIRS
     * Weikuan Yu, Oak Ridge National Laboratory

PUBLICATION CHAIR
     * Luca Valcarenghi, Scuola Superiore Sant'Anna

FINANCE CHAIR
     * Herzel Ashkenazi, Xilinx

TUTORIAL CO-CHAIRS
     - TBA

REGISTRATION CHAIR
     * Songkrant Muneenaem, Washington University in St. Louis

Webmaster
     * Liz Rogers, LRD Group

Steering Committee
     o Allen Baum, Intel
     o Lily Jow, Hewlett Packard
     o Mark Laubach, Broadband Physics
     o John Lockwood, Washington University in St. Louis
     o Daniel Pitt, Santa Clara University