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From: Brian Barrett (brbarret_at_[hidden])
Date: 2006-03-12 11:57:40


Hi Julian -

Can you send me the top-level config.log file? The code you're
running into problems with shouldn't be compiled on a G4-based
machine. It exists for Mac OS X 10.3 on the G5, which could emit a
strange mixed mode assembly that supported 64 bit operations in a 32
bit application. Since you're on a 32 bit platform, it definitely
won't do what we want.

Thanks,

Brian

On Mar 12, 2006, at 7:24 AM, Julian Seward wrote:

>
> r9191 (approximately Fri 3 March 06) does not build on ppc32-linux
> due to use of register names of the form "r9" etc in
> opal/include/opal/sys/powerpc/atomic.h, in opal_atomic_cmpset_64().
> You must use either names of the form "%%r9" or just plain "9",
> or give gcc the flag -mregnames (iirc). The plain-digit convention
> is what the rest of the assembly fragments in that file use.
> My inelegant fix is below.
>
> This is with SuSE 10.0 running on a Mac Mini. (glibc 2.3.5, gcc
> 4.0.2)
>
> Config args were --with-memory-manager=none --disable-mpi-f77
>
> J
>
> Index: opal/include/opal/sys/powerpc/atomic.h
> ===================================================================
> --- opal/include/opal/sys/powerpc/atomic.h (revision 9191)
> +++ opal/include/opal/sys/powerpc/atomic.h (working copy)
> @@ -259,17 +259,17 @@
> * is very similar to the pure 64 bit version.
> */
> __asm__ __volatile__ (
> - "ld r4,%2 \n\t"
> - "ld r5,%3 \n\t"
> - "1: ldarx r9, 0, %1 \n\t"
> - " cmpd 0, r9, r4 \n\t"
> + "ld %%r4,%2 \n\t"
> + "ld %%r5,%3 \n\t"
> + "1: ldarx %%r9, 0, %1 \n\t"
> + " cmpd 0, %%r9, %%r4 \n\t"
> " bne- 2f \n\t"
> - " stdcx. r5, 0, %1 \n\t"
> + " stdcx. %%r5, 0, %1 \n\t"
> " bne- 1b \n\t"
> "2: \n\t"
> - "xor r5,r4,r9 \n\t"
> - "subfic r9,r5,0 \n\t"
> - "adde %0,r9,r5 \n\t"
> + "xor %%r5,%%r4,%%r9 \n\t"
> + "subfic %%r9,%%r5,0 \n\t"
> + "adde %0,%%r9,%%r5 \n\t"
> : "=&r" (ret)
> : "r"(addr),
> "m"(oldval), "m"(newval)
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