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Subject: Re: [hwloc-users] Object Depth
From: Samuel Thibault (samuel.thibault_at_[hidden])
Date: 2012-03-13 06:54:22

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Marwan Abd Ellah, le Tue 13 Mar 2012 11:33:18 +0100, a écrit :
> I was using the HWLoc library v 1.4.1 for getting a cpuset of the socket
> connected to a certain PCI device (mainly GPU). When I was trying to print the
> topology tree I got the following 
> Machine#0(12GB)
>   Socket#0
>     L3(12MB)
>       L2(256KB)
>         L1(32KB)
>           Core#0
>             PU#0
>             PU#6
>       L2(256KB)
>         L1(32KB)
>           Core#1
>             PU#1
>             PU#7
>       L2(256KB)
>         L1(32KB)
>           Core#2
>             PU#2
>             PU#8
>       L2(256KB)
>         L1(32KB)
>           Core#8
>             PU#3
>             PU#9
>       L2(256KB)
>         L1(32KB)
>           Core#9
>             PU#4
>             PU#10
>       L2(256KB)
>         L1(32KB)
>           Core#10
>             PU#5
>             PU#11
>   HostBridge#0
>     PCIBridge#16
>       PCI 1b4b:9123#4096
>         Block
>         Block
>     PCIBridge#48
>       PCI 10de:1086#12288
>     PCI 8086:10ce#400
>       Net
>     PCIBridge#452
>       PCI 197b:2363#20480
>       PCI 197b:2363#20481
>     PCI 8086:3a20#498
>       Block
>     PCI 8086:3a26#501
>
> This means that the Socket30 and the HostBridge#0 are at the same level
> (hwloc_obj_t->depth), but fetching this parameter for each object, I have a
> correct value for the Socket which is 1 and "-3" for the host bridge. Do you
> have a clue about this? 

The depth is not exactly the same as the tree depth, even for CPUs, for
instance you could have such heterogeneous case:

Machine
  Socket
    L3
      L2
       L1
         core
       L1
         core
  Socket
    L2
      L1
        core

hwloc will make sure that all L2 caches have the same depth value, even
if in the tree they don't.

In the case of PCI devices, we just put them aside on completely
separate depths, so that applications can continue using depths as an
orthogonal way to address CPU objects.

Samuel

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