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Subject: Re: [hwloc-users] Thread core affinity
From: Gabriele Fatigati (g.fatigati_at_[hidden])
Date: 2011-08-01 06:16:06


Hi,

reading a hwloc-v1.2-a4 manual, on page 15, i look an example with 4-socket
2-core machine with hyperthreading.

Core id's are not exclusive as said before. PU's id are exclusive but not
physically sequential (I suppose)

PU P#0 is in socket P#0 on Core P#0. PU P#1 is in another socket! (core
P#0). So, are not physically near. I aspect that with Hyperthreading, and 2
hardware threads each core, PU P#0 and PU P#1 are on the same core. If is it
not true, using in a OMP PARALLEL region with 2 software threads:

$ pragma omp paralle num_threads(2)

tid= omp_get_thread_num();

hwloc_obj_t core = hwloc_get_obj_by_type(topology, HWLOC_OBJ_PU, tid);
hwloc_cpuset_t set = hwloc_bitmap_dup(core->cpuset);
hwloc_bitmap_singlify(set);

hwloc_set_cpubind(topology, set, HWLOC_CPUBIND_THREAD);

i would bind thread 0 on PU P#0 and thread 1 on PU P#1, supposing are
physically near. But i thinks it not works..

2011/7/29 Samuel Thibault <samuel.thibault_at_[hidden]>

> Gabriele Fatigati, le Fri 29 Jul 2011 13:34:29 +0200, a écrit :
> > I forgot to tell you these code block is inside a parallel OpenMP region.
> This
> > is the complete code:
> >
> > #pragma omp parallel num_threads(6)
> > {
> > int tid = omp_get_thread_num();
> >
> > hwloc_obj_t core = hwloc_get_obj_by_type(topology, HWLOC_OBJ_CORE, tid);
> >
> > and other code block is:
> >
> > #pragma omp parallel num_threads(6)
> > {
> > int tid = omp_get_thread_num();
> >
> > hwloc_obj_t core = hwloc_get_obj_by_type(topology, HWLOC_OBJ_PU, tid);
>
> Ok, so it depends whether you want to put your OpenMP threads on
> separate cores (then the first code which distributes among cores), or
> if you're ok with letting them share a core (then the first code which
> distributes among threads).
>
> Maybe try and run lstopo --top to see the result.
>
> Samuel
> _______________________________________________
> hwloc-users mailing list
> hwloc-users_at_[hidden]
> http://www.open-mpi.org/mailman/listinfo.cgi/hwloc-users
>

-- 
Ing. Gabriele Fatigati
Parallel programmer
CINECA Systems & Tecnologies Department
Supercomputing Group
Via Magnanelli 6/3, Casalecchio di Reno (BO) Italy
www.cineca.it                    Tel:   +39 051 6171722
g.fatigati [AT] cineca.it