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Subject: Re: [hwloc-users] Problem: hwloc-1.0rc1 on AMD Barcelona processor
From: Brice Goglin (Brice.Goglin_at_[hidden])
Date: 2010-04-29 01:35:12


Hello,

Somebody already reported a similar problem. If I remember correctly, it
was kernel bug. /sys/devices/system/cpu*/cache/index*/ contains
erroneous virtual files. You should upgrade to a more recent kernel.

In the vast majority of cases, hwloc does nothing but reading what the
kernel says anyway.

Brice

On 29/04/2010 04:42, Hao Wang wrote:
> Hi guys
>
> I use hwloc-1.0rc1 on AMD Barcelona machine (AMD Opteron Processor
> 8350). But, it looks like hwloc-1.0rc1 detects my machine with a problem:
>
> lstopo command output information is below:
>
> Machine (16GB)
> NUMANode #0 (phys=0 4015MB) + Socket #0
> L3 #0 (2048KB) + L2 #0 (512KB) + L1 #0 (512KB) + Core #0 + PU #0
> (phys=0)
> L3 #1 (2048KB) + L2 #1 (512KB) + L1 #1 (512KB) + Core #1 + PU #1
> (phys=1)
> L3 #2 (2048KB) + L2 #2 (512KB) + L1 #2 (512KB) + Core #2 + PU #2
> (phys=2)
> L3 #3 (2048KB) + L2 #3 (512KB) + L1 #3 (512KB) + Core #3 + PU #3
> (phys=3)
> NUMANode #1 (phys=1 4040MB) + Socket #1
> L3 #4 (2048KB) + L2 #4 (512KB) + L1 #4 (512KB) + Core #4 + PU #4
> (phys=4)
> L3 #5 (2048KB) + L2 #5 (512KB) + L1 #5 (512KB) + Core #5 + PU #5
> (phys=5)
> L3 #6 (2048KB) + L2 #6 (512KB) + L1 #6 (512KB) + Core #6 + PU #6
> (phys=6)
> L3 #7 (2048KB) + L2 #7 (512KB) + L1 #7 (512KB) + Core #7 + PU #7
> (phys=7)
> NUMANode #2 (phys=2 4040MB) + Socket #2
> L3 #8 (2048KB) + L2 #8 (512KB) + L1 #8 (512KB) + Core #8 + PU #8
> (phys=8)
> L3 #9 (2048KB) + L2 #9 (512KB) + L1 #9 (512KB) + Core #9 + PU #9
> (phys=9)
> L3 #10 (2048KB) + L2 #10 (512KB) + L1 #10 (512KB) + Core #10 + PU
> #10 (phys=10)
> L3 #11 (2048KB) + L2 #11 (512KB) + L1 #11 (512KB) + Core #11 + PU
> #11 (phys=11)
> NUMANode #3 (phys=3 4040MB) + Socket #3
> L3 #12 (2048KB) + L2 #12 (512KB) + L1 #12 (512KB) + Core #12 + PU
> #12 (phys=12)
> L3 #13 (2048KB) + L2 #13 (512KB) + L1 #13 (512KB) + Core #13 + PU
> #13 (phys=13)
> L3 #14 (2048KB) + L2 #14 (512KB) + L1 #14 (512KB) + Core #14 + PU
> #14 (phys=14)
> L3 #15 (2048KB) + L2 #15 (512KB) + L1 #15 (512KB) + Core #15 + PU
> #15 (phys=15)
>
> I'm not sure whether hwloc gave out the correct information. From my
> understanding, L3 cache should be shared by for cores in each socket;
> and L1 cache size shouldn't be 512KB. Are there somebody to confirm it?
>
> Thanks
>
> - Hao
>
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