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Subject: Re: [hwloc-devel] hwloc powerpc rhel5 and power7 patch
From: Alexey Kardashevskiy (aik_at_[hidden])
Date: 2010-09-21 20:33:41


On 21/09/10 19:15, Samuel Thibault wrote:
>>>> + /* Add L1 cache */
>>>> + /* Ignore Instruction caches */
>>>> +
>>>> + /* d-cache-block-size - ignore */
>>>> + /* d-cache-line-size - to read, in bytes */
>>>> + /* d-cache-sets - ignore */
>>>> + /* d-cache-size - to read, in bytes */
>>>> + /* d-tlb-sets - ignore */
>>>> + /* d-tlb-size - ignore, always 0 on power6 */
>>>> + /* i-cache-* and i-tlb-* represent instruction cache, ignore */
>>>> + uint32_t d_cache_line_size = 0, d_cache_size = 0;
>>>> + if ( (0 != hwloc_read_uint32(cpu,
>>>> "d-cache-line-size",&d_cache_line_size, root_fd))&&
>>>> + (0 != hwloc_read_uint32(cpu, "d-cache-size",&d_cache_size,
>>>> root_fd)) ) {
>>>> + struct hwloc_obj *cache =
>>>> + hwloc_alloc_setup_object(HWLOC_OBJ_CACHE, -1);
>>>> + cache->attr->cache.size = d_cache_size;.
>>>> + cache->attr->cache.depth = 1;
>>>> + cache->attr->cache.linesize = d_cache_line_size;
>>>>
>>>>
>>> I would rather create an L1 cache object as soon as any of the cache
>>> properties is there, and then fill the properties with what is actually
>>> available.
>>>
>>>
> What I mean is replace
>
> if ( (0 != hwloc_read_uint32(cpu, "d-cache-line-size",&d_cache_line_size, root_fd))&&
> (0 != hwloc_read_uint32(cpu, "d-cache-size",&d_cache_size,
>
> with
>
> if ( (0 != hwloc_read_uint32(cpu, "d-cache-line-size",&d_cache_line_size, root_fd))||
> (0 != hwloc_read_uint32(cpu, "d-cache-size",&d_cache_size,
>
> (i.e. replace&& with ||) and fix the rest accordingly.
>
>
What values should I use for property which is not present? cache_size =
-1 and cache_line_size = -1 or what?