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Subject: Re: [hwloc-devel] Cacheline sizes
From: Wheeler, Kyle Bruce (kbwheel_at_[hidden])
Date: 2010-05-25 17:12:21


On May 25, 2010, at 3:00 PM, Brice Goglin wrote:

> The attached patch implements a "linesize" cache attribute. You now get
> things like
> L3Cache #0 (8192KB line=64)
> L2Cache #0 (256KB line=64)
> L1Cache #0 (32KB line=64)

Cool!

>> Why is runtime icache information important? :)
>
> Some people manually optimizing their kernels want this kind of info as
> well as TLB size for instance...

I was being flip; I don't see why icache is more relevant to topology and the apparent purpose of hwloc than any other miscellaneous hardware detail (such as floating point unit count).

-- 
Kyle Wheeler, PhD
kbwheel_at_[hidden]